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AMD’s Ryzen 3D V-Cache chip has been developed for many years

AMD announced its 3D V-Cache technology a few months ago, demonstrating incredible performance improvements by simply stacking more L3 caches (up to 64MB) on top of Ryzen CPUs.Now thanks Yuzo Fukuzaki from TechInsights, We have more details about 3D V-Cache. This includes data showing that modern Zen 3 CPUs were designed to accommodate stacked 3D caches from the beginning, which tells us that this technology has been in use for many years.

According to Fukuzaki, he found connection points and 3D stack buffer space on a standard Ryzen 9 5950X sample. Looking at the picture below, you can see the points on the edge of the Zen 3 chip, which can be connected to the 3D V-Cache. If you want to install another 3D cache stack, these are copper connection points.

(Image source: LinkedIn)

This mounting process uses TSV (Through Silicon Via) to fix the second layer of SRAM to the chip through hybrid bonding. Since TSV uses copper instead of solder, SRAM has a higher bandwidth and thermal efficiency than simply soldering the chips together.

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