Intel prepares software-defined Xeon CPUs: buy now, add features later
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Intel released a repair (be found Fronix) Supports its Intel Software Defined Chip (SDSi) mechanism in Linux. This technology is suitable for the upcoming Intel Xeon processor and is designed to activate other chip functions after the processor is deployed.
The patch does not mention any specific features it wants to unlock or any specific Xeon Scalable processors it wants to upgrade (we think Sapphire Rapids), but it gives some general understanding of how it should work. Facts have proved that the entire process is purely software, so no hardware operations are required. Therefore, it can be done relatively easily.
Intel’s SDSi program seems to be a major one, but Intel is no stranger to providing software upgrades for its CPUs. The latest example of such software upgradeability is Intel’s Virtual RAID on CPU (Intel VROC) Technology relies on the Intel Volume Management Device (VMD) hardware built into the CPU and must be activated with a special hardware key. The company has also provided an upgrade service software upgrade function for its entry-level client CPU, which will increase its clock speed, unlock previously unused cache parts, and activate hyper-threading technology.
Intel must also fully describe what it intends to offer under its software-defined chip program, but the number of possible options is unlimited.
Initially, Intel’s Pentium II/III/4 Xeon processors were essentially desktop components with additional cache and SMP (Symmetric Multiprocessing) support. However, Intel’s Xeon processors have gained a large number of features not supported by client CPUs and not required by client systems in the past 15 years. In fact, Intel’s latest Xeon Scalable CPU supports instructions that are not supported by the client model.
In recent years, Intel has begun to differentiate the features and performance of its Xeon Scalable processors by supporting more memory, eight-way SMP functions, the maximum number of cores, and the high-quality components of all the technologies that the chip giant must provide.
With the introduction of the fourth-generation Xeon scalable “Sapphire Rapids” processor, Intel will support a large number of new instructions and dedicated accelerators designed for emerging workloads. However, many Intel enterprise customers who use on-premise servers may not see any direct value in technologies such as Advanced Matrix Extensions (AMX), Data Stream Accelerator (DSA), or CXL 1.1. In fact, even hyperscale cloud service providers may not need all the features on all their systems.
In order to meet the immediate needs of its customers, Intel hopes to provide them with the CPUs they need now, but if customers need additional features or just decide to repurpose their machines, then with the help of SDSi, it can open the door for future software upgrades . This scalability ensures that Intel’s customers will not choose AMD when they need one or two additional features and will still pay for Intel’s technology.
The following is the official description of Intel’s Software Defined Chip (SDSi) mechanism:
Intel Software Defined Chip (SDSi) is a post-manufacturing mechanism used to activate additional chip functions. The feature is enabled through the license activation process. The SDSi driver provides an ioctl interface per socket for applications to perform three main configuration functions:
1. Provide an authentication key certificate (AKC), which is a key written into the internal NVRAM to verify the specific activation load of the function.
2. Provide Capability Activation Payload (CAP), which is a token that uses AKC for authentication and is applied to the CPU configuration to activate new functions.
3. Read the SDSi status certificate, which contains the CPU configuration status.
The ioctl operation executes function-specific mailbox commands that forward the request to the SDSi hardware to perform the authentication of the payload and enable the silicon configuration (available after power cycling).
The SDSi device itself is listed as the PCIe VSEC function on the Intel Out-of-Band Management Service Module (OOBMSM) device. The SDSi device is a unit of the intel_pmt MFD driver, so it has a build dependency on CONFIG_MFD_INTEL_PMT.
Association: https://github.com/intel/intel-sdsi
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