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Intel users will soon trade performance for security again.Fronix Report The latest microcode update will disable Intel Transaction Sync Extension (TSX) by default on the company’s 6th, 7th, and 8th generation processors. Disabling this feature should make these CPUs safer, but it is also expected to result in worse performance for tasks that benefit from using TSX.
Phoronix stated that these updates were caused by memory ordering issues in TSX.A kind white paper (PDF) indicates that Intel has been aware of the issue since June 2018, and the company issued a microcode update in October 2018 to address the vulnerability. Nevertheless, it took nearly three years to release an update that disables TSX by default. These updates are included in Intel Platform Update 2021.1, which debuted on June 8.
“Workloads that benefit from Intel TSX may experience performance changes,” Intel Said on June 12It also stated that due to the microcode update, “some advanced users of performance monitoring (Perfmon) may need to change their collection scripts and methods”. The company did not provide more information about the performance impact of tasks affected by these changes.
But there is good news: Intel stated that it “does not want these microcode updates to affect those who do not use [Performance Monitoring Unit], Or people who only use updated PMU drivers and tools”, although it “recommends PMU driver developers and performance tool developers to follow the guidance in this document. “The average person is unlikely to notice a significant change in performance.
Developers have prepared the Linux kernel for these microcode updates. Phoronix pointed out that this change was made for the Linux 5.14 patch: “Add support for the new Intel microcode that deprecates TSX on some models, and when TSX transactions are always aborted due to this microcode update, there will be no Enable kernel workarounds for these CPUs.” This support may also apply to Linux 5.13.
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